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| author | Matias N. Goldberg <dark_sylinc@yahoo.com.ar> | 2023-08-27 19:38:34 -0300 |
|---|---|---|
| committer | Matias N. Goldberg <dark_sylinc@yahoo.com.ar> | 2023-08-27 19:38:34 -0300 |
| commit | 677d2d6fb097f75b0a543013004391c0a2568319 (patch) | |
| tree | 63e9a5af5d7759e674ed4bb5831dd527cc40d747 /drivers/vulkan | |
| parent | 6da4ad16624484398331f393b503f8b5e2888c51 (diff) | |
| download | redot-engine-677d2d6fb097f75b0a543013004391c0a2568319.tar.gz | |
Fix missing EARLY_FRAGMENT_TESTS_BIT barrier flags
Diffstat (limited to 'drivers/vulkan')
| -rw-r--r-- | drivers/vulkan/rendering_device_vulkan.cpp | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/drivers/vulkan/rendering_device_vulkan.cpp b/drivers/vulkan/rendering_device_vulkan.cpp index b955fc2fca..803a109863 100644 --- a/drivers/vulkan/rendering_device_vulkan.cpp +++ b/drivers/vulkan/rendering_device_vulkan.cpp @@ -7806,8 +7806,10 @@ void RenderingDeviceVulkan::draw_list_end(BitField<BarrierMask> p_post_barrier) image_barriers = (VkImageMemoryBarrier *)alloca(sizeof(VkImageMemoryBarrier) * draw_list_storage_textures.size()); } - uint32_t src_stage = VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT | VK_PIPELINE_STAGE_LATE_FRAGMENT_TESTS_BIT; - uint32_t src_access = VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT | VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT; + uint32_t src_stage = VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT | + VK_PIPELINE_STAGE_EARLY_FRAGMENT_TESTS_BIT | VK_PIPELINE_STAGE_LATE_FRAGMENT_TESTS_BIT; + uint32_t src_access = + VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT | VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT; if (image_barrier_count) { src_stage |= VK_PIPELINE_STAGE_VERTEX_SHADER_BIT | VK_PIPELINE_STAGE_FRAGMENT_SHADER_BIT; @@ -8374,8 +8376,11 @@ void RenderingDeviceVulkan::barrier(BitField<BarrierMask> p_from, BitField<Barri src_access_flags |= VK_ACCESS_SHADER_WRITE_BIT; } if (p_from.has_flag(BARRIER_MASK_FRAGMENT)) { - src_barrier_flags |= VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT | VK_PIPELINE_STAGE_LATE_FRAGMENT_TESTS_BIT; - src_access_flags |= VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT | VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT; + src_barrier_flags |= VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT | + VK_PIPELINE_STAGE_EARLY_FRAGMENT_TESTS_BIT | + VK_PIPELINE_STAGE_LATE_FRAGMENT_TESTS_BIT; + src_access_flags |= + VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT | VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT; } if (p_from.has_flag(BARRIER_MASK_TRANSFER)) { src_barrier_flags |= VK_PIPELINE_STAGE_TRANSFER_BIT; |